A green tape is formed by casting a thin layer of a slurry dispersion comprising some combination of the following: inorganic additives, glass, ceramic fillers, polymeric binder and solvent(s) onto a flexible substrate, and heating the cast layer to remove the volatile solvent. The green tape is then blanked into master sheets or collected in a roll form. The tape itself is typically used as a dielectric or insulating material for multilayer electronic circuits. A complete description of the types of tape materials used and the associated conductors and resistor materials, and how the circuit is assembled and then processed is provided below.
An interconnect circuit board or package is the physical realization of electronic circuits or subsystems from a number of extremely small circuit elements electrically and mechanically interconnected. It is frequently desirable to combine these diverse type electronic components in an arrangement so that they can be physically isolated and mounted adjacent to one another in a single compact package and electrically connected to each other and/or to common connections extending from the package.
Complex electronic circuits generally require that the circuit be constructed of several levels of conductors separated by corresponding insulating dielectric tape layers. The conductor layers are interconnected through the dielectric layers that separate them by electrically conductive pathways, called via fills.
In all subsequent discussions, it is understood that the use of the term tape layer or dielectric layer implies the presence of metallizations both surface conductor and interconnecting via fills which are co-fired with the ceramic tape. In a like manner, the term laminate or composite implies a collection of metallized tape layers that have been pressed together to form a single entity.
The use of a ceramic-based green tape to make low temperature co-fired ceramic (LTCC) multilayer circuits was disclosed in U.S. Pat. No. 4,654,095 to Steinberg. The co-fired, free sintering process offers many advantages over previous technologies. However, the fired shrinkage tolerance of between ±0.15 and 0.30% for free-sintered LTCC has proved too broad to facilitate the general application of fine-pitch surface mount devices. In this respect it is generally understood that the manufacture of LTCC laminates larger than 6″ by 6″ is not practical unless the shrinkage tolerance of the LTCC can be substantially reduced below the levels normally attributed to free sintering. Such a reduction may be achieved through the application of constrained sintering technology.
Constrained sintering technology was disclosed by Mikeska in U.S. Pat. No. 5,085,720 and U.S. Pat. No. 5,254,191 where the concept of release-tape-based sintering or PLAS (acronym for pressureless-assisted sintering) was first introduced. In the PLAS process the release tape, which does not sinter to any appreciable degree, acts to pin and restrain any possible x-, y-shrinkage of the laminate. The release tape is removed prior to any subsequent circuit manufacturing operation. Removal is achieved by one of a number of suitable procedures such as brushing, sand blasting or bead blasting. The major benefit of PLAS is a reduction in the shrinkage tolerance to less than 0.04% that enables substrates as large as 10″ by 10″ to be produced. The capability of being able to make larger substrates with very good positional tolerance has to be balanced against the need to purchase a tape material that does not reside in the final product and the restriction that the top and bottom conductors cannot be co-processed with the laminate. These necessary latter steps may only be carried out following removal of the release tape as part of a post-fired strategy.
A slight modification of the art taught by Mikeska is presented in U.S. Pat. No. 6,139,666 by Fasano et al. where the edges of a multilayer ceramic are chamfered with a specific angle to correct edge distortion, due to imperfect shrinkage control exerted by externally applied release tape during firing.
Shepherd proposed another process for control of registration in an LTCC structure in U.S. Pat. No. 6,205,032. The process fires a core portion of a LTCC circuit incurring normal shrinkage and shrinkage variation of an unconstrained circuit. Subsequent layers are made to match the features of the pre-fired core, which then is used to constrain the sintering of the green layers laminated to the rigid pre-fired core. The planar shrinkage is controlled to the extent of 0.8%-1.2% but is never reduced to zero. In consequence the resultant shrinkage or positional tolerance is higher than the required 0.05%. For this reason, the technique is limited to only a few additional layers before registration becomes unacceptable and component placement becomes impossible.
The presence of large numbers of surface-mount passive components, such as capacitors, has represented a significant limitation on the minimum possible size of a finished circuit. As LTCC design has evolved one strategy for increasing function per unit area and reducing circuit size has been to relocate such surface-mounted components inside the circuit.
Initially the achievement of increased capacitance inside the circuit was achieved through the use of thinner LTCC tape layers of the same chemistry as the bulk material. Such layers might be 25 to 50 micrometers in green (unfired) thickness as compared to the more commonly used 125 or 250 micro-meter green thicknesses. The increase in capacitance is inversely proportional to the thickness. For example a 25 micro-meter LTCC tape will produce a maximum capacitance 10 times higher than a 250 micro-meter LTCC tape for the same area. Although impressive, this increase in capacitance does not enable the embedding of many capacitors. It may account for perhaps 10% of the total for filtering and tuning applications (i.e., <100 pico-Farad) in RF circuits, but virtually none in the case of automotive engine controllers where the EMI filtering is important (1 to 10 nano-Farad). The same applies to de-coupling capacitors for power supplies (10 nano-Farad to 1 micro-farad). In the case of the later, the required capacitance values are too high and not practically achievable through the use of thinner LTCC layers. Attainment of such values is only possible through the use of high dielectric constant LTCC materials (k>20<5000) coupled with an increase in the number of interconnected parallel LTCC layers and as a last option, an increase in the area of each capacitor.
It is known that dielectric layers of different chemistries can be directly incorporated into an LTCC multilayer ceramic body. In U.S. Pat. No. 5,144,526, awarded to Vu and Shih, LTCC structures are described whereby high dielectric constant materials are interleaved with layers of low dielectric constant material in a symmetrical arrangement.
The above symmetrical configuration was chosen in order to prevent undesirable cambering of the composite. This requirement represents a limitation to the designer's flexibility to lay out a circuit in the most optimal way. In most cases the designer wants the high k layer to be closer to the top than in the center.
A second less obvious but more significant disadvantage is that the shrinkage of the composite cannot be predicted form the free shrinkages of the individual high and low dielectric constant materials. Furthermore, the three dimensional shrinkage of the composite will vary depending on the proportions and the distribution of the two tapes in the structure. The consequent variations in x-, y-, and z-shrinkage will change capacitor values in such a way that they are unpredictable and can only be fixed by trial and error. In addition, the tolerance of such capacitors becomes excessively high (>30%) which represents another limitation to the utility of the overall concept.
As is taught in U.S. Pat. No. 6,776,861 by Wang et al., it is possible to harness combinations of different dielectric chemistries not only to potentially add higher dielectric constant layers but, through the use of closely matched chemistries, achieve a fired structure or body with a final shrinkage of zero. In other words a new and unique method of constrained sintering has been developed. This invention involves a fired laminate that comprises layers of a primary dielectric tape which define the bulk properties of the final ceramic body and one or more layers of a secondary or self-constraining tape which is fully internal, non-fugitive, non-removable, non-sacrificial and non-release. The purpose of the latter is to constrain the sintering of the primary tape so that the net shrinkage in the x, y direction is zero. However, an additional purpose for the constraining tape could be to introduce a higher dielectric constant material into the structure and this indeed was demonstrated in U.S. Pat. No. 6,776,861. This process is referred to as a self-constraining process and the acronym SCPLAS is applied to it. The shrinkage tolerances achieved by this process are very similar to those achieved by the release-tape based constrained sintering process described by Mikeska et al. The self-constraining tape is placed in strategic locations within the structure and remains part of the structure after co-firing is completed.
In an extension of the above invention U.S. application Ser. No. 10/850,878 Wang et al. describe the use of three LTCC tape chemistries to achieve a self-constrained fired structure with asymmetrically positioned high k tape layers.
Successful combination of different dielectric chemistries in a single laminate requires matching of both the chemical and mechanical properties of the materials. Undesired side reactions and or the formation of unpredicted intermediate phases can impact electrical performance and, through the introduction of residual stresses in the fired structure, major dimensional changes including severe distortion. In general the primary or bulk tape has a fixed chemistry and the modification of it to improve compatibility of the two is not possible. All of the above places significant limitations on the range of materials available. This, in turn, reduces the degrees of freedom available to the formulator of such materials. In other words the development of a high k core material may be limited because of the chemical limits imposed by the need for it to be compatible with the primary or bulk tape.